2000

Toshinori Yamada, Takashi Mori, Shin-ichiro Tago, and Shuichi Ueno: Optimal Implementation of CCC's by Three-Dimensional Space-Invariant Optical Interconnections; Proc. of IEEE Asia Pacific Conference on Circuits and Systems 2000, pp.879-882, 2000.

Toshinori Yamada, Akitsugu Watanabe, and Shuichi Ueno: On Sequential Diagnosis of Multiprocessor Systems; Technical Report of the Institute of Electronics, Information and Communication Engineers, Vol.100, No.415, pp.65-72, 2000.

Suguru Amitani, Toshinori Yamada, and Shuichi Ueno: Optimal Layouts of Virtual Paths in Complete Binary Tree ATM Networks; Proc. of the 61th National Convention of Information Processing Society of Japan, Vol.1, pp.231-232, 2000; Technical Report of the Institute of Electronics, Information and Communication Engineers, Vol.100, No.415, pp.73-78, 2000.

Kumiko Nomura, Toshinori Yamada, and Shuichi Ueno: Sparse Networks Tolerating Random Faults for Tree-Like and Butterfly-Like Networks; Proc. of the 61th National Convention of Information Processing Society of Japan, Vol.1, pp.229-230, 2000; Technical Report of the Institute of Electronics, Information and Communication Engineers, Vol.100, No.415, pp.59-64, 2000; Proc. of IEEE Asia Pacific Conference on Circuits and Systems 2000, pp.799-802, 2000.

Toshinori Yamada, Akitsugu Watanabe, and Shuichi Ueno: A Note on Sequential Diagnosis of Multiprocessor Systems; Proc. of the 61th National Convention of Information Processing Society of Japan, Vol.1, pp.227-228, 2000.

Yoshiyasu Doi, Toshinori Yamada, and Shuichi Ueno: Three-Dimensional VLSI Layouts of de Bruijn and Shuffle-Exchange Networks; Technical Report of the Institute of Electronics, Information and Communication Engineers, Vol.COMP99-71, pp.17-24, 2000.

Atsushi Yamazaki, Toshinori Yamada, and Shuichi Ueno: On Sequential Diagnosis of Multiprocessor Systems under Probabilistic Models ; Technical Report of the Institute of Electronics, Information and Communication Engineers, Vol.COMP99-70, pp.9-16, 2000.