Research Area

• Electronic Design Automation (EDA)
  • VLSI Physical Design : Floorplan, Placement, and Routing
  • Routing for VLSI Packages and PCBs
  • General Synchronous Circuit Synthesis

Research Topics

• Lithography CAD
  • Double Patterning
• Clock Scheduling
  • Clock Period Minimization
  • Clock Distribution Cost Reduction
  • Peak Power Reduction
• Circuit Synthesis
  • Delay Insertion
  • Register Relocation
  • Variable Latency Unit
• Routing
  • Ball Grid Array Package
  • Routing Control in PCB

Paper List (Atsushi Takahashi)