Takahashi Lab
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研究分野

  • Electronic Design Automation (EDA)
    • VLSI Physical Design : Floorplan, Placement, and Routing
    • Routing for VLSI Packages and PCBs
    • General Synchronous Circuit Synthesis

研究紹介

研究課題

  • Lithography CAD
    • Double Patterning
  • Clock Scheduling
    • Clock Period Minimization
    • Clock Distribution Cost Reduction
    • Peak Power Reduction
  • Circuit Synthesis
    • Delay Insertion
    • Register Relocation
    • Variable Latency Unit
  • Routing
    • Ball Grid Array Package
    • Routing Control in PCB

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Last modified: March 15, 2015
 
 
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