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1998
Takashi Ohtsuka and Shuichi Ueno: Upper Bounds for the
Degree of Sequential Diagnosability; Proc. of 1998 IEEE
Asia-Pacific Conference on Circuits and Systems, pp.711-714,
1998.
Toshinori Yamada and Shuichi Ueno: Sparse Networks Tolerating
Random Faults; Information Processing Society of Japan
SIG Notes, Vol.98, No.98 pp.41-45, 1998.
Toshinori Yamada and Shuichi Ueno:
Fault-Tolerant
Graphs for Tor i; Networks, Vol.32, pp.181-188,
1998.
Yoshiyasu Doi, Toshinori Yamada, and Shuichi Ueno: A Note
on Efficient Layouts for de Bruijn Networks; Proc. of the
57th National Convention of Information Processing Society
of Japan, Vol.1, pp.137-138, 1998.
Toshinori Yamada and Shuichi Ueno: A Note on the Circuit-Switched
Fixed Routing in Networks; Proc. of the 57th National Convention
of Information Processing Society of Japan, Vol.1, pp.131-132,
1998.
Shin'ichiro Tago and Shuichi Ueno: A Note on the Three-Dimensional
Optical Implementation of Regular Bipartite Graphs; Proc.
of the 1998 Engineering Sciences Society Conference of
the Institute of Electronics, Information and Communication
Engineers, pp.203-204, 1998.
Magnus M. Halldorsson, Shuichi Ueno, Hiroshi Nakao, and
Yoji Kajitani:
Approximating
Steiner Trees in Graphs with Restricted Weights ; Networks,
Vol.31, pp.283-292, 1998.
Toshinori Yamada and Shuichi Ueno:
Fault-Tolerant
Hypercubes with Small Degree ; IEICE TRANS. Fundamentals,
Vol.E81-A, No.5, pp.807-813, 1998.
Akira Matsubayashi and Shuichi Ueno:
A
Linear Time Algorithm for Constructing Proper-Path-Decomposition
of Width Two ; IEICE TRANS. Fundamentals, Vol.E81-A,
No.5, pp.729-737, 1998.
Satoshi Tayu and Shuichi Ueno:
On
Embedding Binary Trees into Hypercubes ; The Transactions
of the Institute of Electronics, Information and Communicaton
Engineers A, Vol.J81-A, No.4, pp.682-695, 1998(in Japanese).
T. Yamada, T. Tono-oka, and S. Ueno: Tight Bounds for
Circuit-Switched Fixed Routing in Networks; Technical Report
of the Institute of Electronics, Information and Communication
Engineers, Vol.CPSY97-111, No.524, pp.75-82, 1998.
Toshinori YAMADA and Shuichi UENO:
Fault-Tolerant
Meshes with Efficient Layouts ; IEICE TRANS. on Information
and Systems, Vol.E81-D, No.1, pp.56-65, 1998.
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