2008

Satoshi Tayu, Shigeru Ito, and Shuichi Ueno: On Fault Testing for Reversible Circuits , IEICE Trans. Inf. & Syst., Vol. E91-D, No.12, pp.2770-2775, 2008.

S. Tayu and S. Ueno: On the Three-Dimensional Single-Active-Layer Routing, IEICE Technical Report, Vol.108, No.277, pp.1-4, 2008.

A.M.S. Shrestha, S. Tayu, and S. Ueno: Orthogonal Ray Graphs and Nano-PLA Design, IEICE Technical Report, Vol.108, No.277, pp.5-9, 2008.

Satosi Tayu, Takuya Oshima, and Shuichi Ueno: On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs, IPSJ SIG Technical Reports, Vol.2008, No.84, pp.1-8, 2008.

Anish Man Singh Shrestha, Yohei Kobayashi, Satosi Tayu, and Shuichi Ueno: On Orthogonal Ray Graphs, IPSJ SIG Technical Reports, Vol.2008, No.84, pp.9-15, 2008.

Satoshi Tayu, Turki Ghazi Al-Mutairi, and Shuichi Ueno: Cost-Constrained Minimum-Delay Multicasting , Journal of Interconnection Networks, Vol. 9, Nos. 1&2, pp.141-155, 2008

Satoshi Tayu, Kumiko Nomura, and Shuichi Ueno: On the Three-Dimensional Orthogonal Drawing of Series-Parallel Graphs , Proceedings of 2008 IEEE International Symposium on Circuits and Systems, pp.212-215, 2008.

Y. Kobayashi, A.M.S. Shrestha, S. Tayu, and S. Ueno: On Orthogonal Ray Graphs, Proceedings of the First AAAC Annual Meeting, p.57, 2008

Eita Kobayashi, Satoshi Tayu, and Shuichi Ueno: Lower Bounds for the Height of Three-Dimensional Channel Routing, Proceedings of the 2008 IEICE General Conference, AS-1-2, 2008.

Takuya Oshima, Satoshi Tayu, and Shuichi Ueno: On the Three-Dimensional Orthogonal Drawing of Outerplanar Graphs, IEICE Technical Report, Vol.107, No.527, pp.93-94, 2008

Yoshinori Kawata, Satoshi Tayu, and Shuichi Ueno: An Efficient Quantum Addition Circuit, IEICE Technical Report, Vol.107, No.527, pp.95-96, 2008

Yohei Kobayashi, Anish Man Singh Shrestha, Satoshi Tayu, and Shuichi Ueno: On Orthogonal Ray Graphs with Applications to NanoPLA Design, IEICE Technical Report, Vol.107, No.527, pp.97-98, 2008